XtremeDX HF SDR

- development in progress

- 2x A/D - 0...50 MHz RF input

- 1x D/A - 0...50 MHz RF output

- USB2 on ARM

- USB3 on FPGA

- 7 series FPGA, BGA 484

- dual core 1 GHz ARM (DSP)

- 7'' TFT

- 12 Layer PCB, controlled impedance

2023-05-02 - "DONE"

                                        2x USB2, USB3 connections and FPGA, CPU capacitors

One layer from 4 high speed layers.

                                                            Bottom side copper and silks

                                                            Top side copper and silks

2023-05-13 

Synchronized PWR SUPPLY

for RFDSP board and TFT display

(not a real size)

2023-08-23

XDX and XDX PWR PCBs

XDX RFDSP assembled - 2023

XDX PWR supply - assembly in progress

2024-03-14

PWR supply done

Testing the FPGA and the input/output clocks of the A/Ds  - LED blink

Testing the RF input relay

    

                                

First tests - under development